Fix release and coverage CI failures
CI / release (arm64, ubuntu-latest-arm64) (pull_request) Successful in 3m22s
CI / pre-commit (pull_request) Successful in 2m6s
CI / test (-DCMAKE_BUILD_TYPE=Debug, debug) (pull_request) Successful in 3m37s
CI / test (-DCMAKE_CXX_FLAGS=-DUSE_64_BIT=1, 64-bit-versions) (pull_request) Successful in 3m29s
CI / test (-DCMAKE_C_COMPILER=gcc -DCMAKE_CXX_COMPILER=g++, gcc) (pull_request) Successful in 3m37s
CI / test (-DUSE_SIMD_FALLBACK=ON, simd-fallback) (pull_request) Successful in 3m28s
CI / release (amd64, ubuntu-latest-amd64) (pull_request) Successful in 4m55s
CI / coverage (pull_request) Successful in 3m37s

* ConflictSet.cpp: enable the interleaved read/write path whenever
  musttail is available, falling back to the default calling convention
  when preserve_none is not supported. This prevents a large block of
  compiled-but-dead code from being counted in coverage.

* CMakeLists.txt: detect which arch-specific hardening-check options the
  installed hardening-check binary supports, including the newer
  hyphenated spellings, so the release test no longer fails with an
  unknown option.

* .gitea/workflows/ci.yml: build the coverage job with
  -DUSE_SIMD_FALLBACK=ON so AVX512-only functions that cannot execute on
  the CI runners are not counted against line coverage.
This commit is contained in:
2026-06-22 14:09:04 -04:00
committed by andrew
parent 4515af3662
commit 0021c6e4e7
2 changed files with 19 additions and 16 deletions
+2 -1
View File
@@ -256,7 +256,8 @@ jobs:
rm -rf build rm -rf build
cmake -S . -B build -G Ninja -DCMAKE_CXX_COMPILER_LAUNCHER=ccache \ cmake -S . -B build -G Ninja -DCMAKE_CXX_COMPILER_LAUNCHER=ccache \
-DCMAKE_C_FLAGS=--coverage -DCMAKE_CXX_FLAGS=--coverage \ -DCMAKE_C_FLAGS=--coverage -DCMAKE_CXX_FLAGS=--coverage \
-DCMAKE_BUILD_TYPE=Debug -DDISABLE_TSAN=ON -DCMAKE_BUILD_TYPE=Debug -DDISABLE_TSAN=ON \
-DUSE_SIMD_FALLBACK=ON
ninja -C build ninja -C build
ccache -s ccache -s
+17 -15
View File
@@ -3080,7 +3080,7 @@ Node *firstGeqPhysical(Node *n, const TrivialSpan key) {
#define PRESERVE_NONE #define PRESERVE_NONE
#endif #endif
#if __has_attribute(musttail) && __has_attribute(preserve_none) #if __has_attribute(musttail)
constexpr bool kEnableInterleaved = true; constexpr bool kEnableInterleaved = true;
#else #else
constexpr bool kEnableInterleaved = false; constexpr bool kEnableInterleaved = false;
@@ -5040,20 +5040,22 @@ struct __attribute__((visibility("hidden"))) ConflictSet::Impl {
assert(allPointWrites || sorted); assert(allPointWrites || sorted);
#endif #endif
if (kEnableInterleaved && count > 1) { if constexpr (kEnableInterleaved) {
interleavedWrites(writes, count, InternalVersionT(writeVersion)); if (count > 1) {
} else { interleavedWrites(writes, count, InternalVersionT(writeVersion));
for (int i = 0; i < count; ++i) { return;
const auto &w = writes[i]; }
auto begin = TrivialSpan(w.begin.p, w.begin.len); }
auto end = TrivialSpan(w.end.p, w.end.len); for (int i = 0; i < count; ++i) {
if (w.end.len > 0) { const auto &w = writes[i];
addWriteRange(rootParent->children[0], begin, end, auto begin = TrivialSpan(w.begin.p, w.begin.len);
InternalVersionT(writeVersion), &writeContext); auto end = TrivialSpan(w.end.p, w.end.len);
} else { if (w.end.len > 0) {
addPointWrite(rootParent->children[0], begin, addWriteRange(rootParent->children[0], begin, end,
InternalVersionT(writeVersion), &writeContext); InternalVersionT(writeVersion), &writeContext);
} } else {
addPointWrite(rootParent->children[0], begin,
InternalVersionT(writeVersion), &writeContext);
} }
} }
} }